In semiconductor manufacture, a single semiconductor die (or chip) is typically mounted within a sealed package. In general, the package protects the die from damage (e.g. breakage, physical abuse) and from contaminants in the surrounding environment (e.g. moisture, chemicals) In addition, the package provides a substantial lead system for connecting the electrical devices formed on the die to a printed circuit board or other external circuitry.
Each die has a lower surface (also referred to as the back of the die) that is devoid of circuitry, and an upper surface (also referred to as the face of the die) having integrated circuitry constructed thereon The integrated circuitry is electrically accessible via die wire bonding pads which may be arranged in a variety of configurations on the face or edges of the die.
Typically the initial component in the packaging process is a leadframe. The leadframe is a metal frame which supports several dies for packaging and provides the leads for the final semiconductor package A typical leadframe strip is produced from metal sheet stock (e.g. a copper alloy) and is adapted to mount several semiconductor dies. During a conventional packaging process, each die is attached to a mounting paddle of the leadframe utilizing an adhesive layer. The adhesive layer is typically formed of an epoxy, acrylic, silicone, or polyimide material that is sandwiched between the bottom of the die and the mounting paddle.
Also, during the packaging process, the bond pads formed on the die are electrically connected to the leads of the leadframe using fine bond wires. Following the application of a polyimide protective layer to the face of the die, it, and a portion of the leadframe to which it is attached, is encapsulated in a plastic material, as are all other die-leadframe assemblies on the leadframe strip. After encapsulation, a trim and form operation separates the resultant interconnected packages and bends the leads of each package into the proper configuration.
Recent advances in semiconductor manufacture have led to higher circuit densities and improved packaging technologies. Some high density circuits, such as 16 mega bit memory devices, use the newly developed lead-on-chip (LOC) packaging technology. A lead-on-chip (LOC) semiconductor package is described in U.S. Pat. No. 4,862,245 to Pashby et al, which is assigned to IBM.
In general, a lead-on-chip (LOC) die is formed without a mounting paddle for the die. The lead fingers of the leadframe not only electrically attach to the bond pads via the bond wires but also adhere to the face of the die and support the die during the encapsulation process. Prior to the encapsulation process, the die, in effect, is mounted to the lower surfaces of the lead fingers. This configuration provides superior heat transfer from the die and shortens the length of the bond wires. In addition, this configuration enhances the reliability of the package seal.
A common method of attaching and wire bonding a LOC die to a LOC leadframe is known as area wire bonding or A-wire bonding. A conventional automated A-wire bonding process includes several process steps. Initially, for attaching the die to the lead fingers of the leadframe, an adhesive tape having a thermoset adhesive on both sides is attached to the underside of the leadframe fingers. The face of the die is then attached to the adhesive tape using heat and pressure. An oven is then used to cure the adhesive tape. After the tape is cured, the leadframe is transferred to a wirebonder machine where the bond wires are connected to the bond pads of the die and to the lead fingers of the leadframe. Via holes in the adhesive tape allow the bond wires to be attached to the bond pads on the die.
In general, the A-wire process is an expensive and complicated manufacturing process. In particular, the adhesive tape is an expensive component which adds to the manufacturing costs of the packaged chip. In addition, with the A-wire process an accurately cut piece of adhesive tape must be precisely attached to the leadframe fingers for each die. This is a delicate process and requires a precise indexing of the die and a precise alignment of the adhesive tape with the die, and with the lead fingers. Moreover, any warpage of the adhesive tape during attachment to the leadframe fingers may cause voids and adhesion problems during attachment of the die.
The A-wire process also requires that different sized tape widths and different sized tape punches for each die size be stocked by a semiconductor manufacturer. This also adds to the expense and complexity of the process. Furthermore, after the adhesive tape is punched out, a large amount of tape is wasted by the process.
In view of the foregoing limitations in the packaging of LOC dies, there is a need in the semiconductor art for an improved method for attaching semiconductor dies and particularly LOC dies to a leadframe. Accordingly, it is an object of the present invention to provide an improved method for attaching a semiconductor die to a leadframe during a chip packaging or encapsulation process. It is another object of the present invention to provide an improved method for attaching a semiconductor die to a leadframe in which an adhesive thermoplastic tape is not required It is a further object of the present invention to provide an improved method for attaching a semiconductor die to a leadframe that is effective, inexpensive and adaptable to large scale semiconductor manufacture.